CXMT Pursues '4F Square' Design to Boost Storage Density in Server Memory
CXMT stated that its proprietary transistor design, known as the '4F square' structure, aims to increase storage density and efficiency, with plans to release a new server-memory product based on this structure by the end of 2026.
According to a company statement reported by the South China Morning Post, CXMT's president, Cao Kanyu, indicated at an industrial event in Shanghai that the company intends to launch a new server-memory product utilizing its proprietary structure before the close of 2026.
The core of this development is the "4F square" design. This structure allows for greater storage density because it accommodates a greater number of cells on one chip, with each memory cell occupying an area equivalent to four square F, where F signifies the minimum line width of a semiconductor. Currently, mainstream commercial dynamic random-access memory (DRAM) employs a 6F square-cell structure.